Chip Process Design Technology

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Question 2: As process-design technology allows engineers to put ever more transistors on a chip, Intel and AMD have chosen to increase the number of cores on each chip. Are there any other feasible choices they could have made instead?


Question 9: During our discussion of memory consistency models, we said that a consistency model is a kind of contract between the software and the memory. Why is such a contract needed?


Question 10: Consider a multiprocessor using a shared bus. What happens if two processors try to access the global memory at exactly the same instant?


Question 16: Suppose that there are n CPUs on a common bus. The probability that any CPU tries to use the bus in a given cycle is p. What is the chance that
a. The bus is idle (0 requests).
b. Exactly one request is made.
c. More than one request is made


Question 25: What is the difference between NC-NUMA and CC-NUMA?
In a NC-NUMA system, processors have no local cache. Each memory access is managed with a modified MMU, which controls if the request is for a local or for a remote block. In the latter case, the request is forwarded to the node containing the requested data. Obviously, programms using remote data (with respect to the CPU requesting them) will run much slower than what they would, if the data were stored in the local memory

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